Automating these features allows design teams to focus more effort on value-added portions of the design.Īltera cemented its leadership position in the high-performance, high-density FPGA market with the launch of its 40-nm Stratix ® IV FPGAs in May 2008.
#ALTERA QUARTUS II V8.1 SOFTWARE#
Quartus II software now also eliminates the need to modify gated clocks manually by automatically converting gated clocks to functionally equivalent logic supported by the FPGA architecture. The design partition planner, introduced in the previous version of Quartus II software, now provides automated partitioning in version 8.1, allowing more designers to leverage the productivity benefits of incremental compilation. Quartus II software version 8.1 helps speed development times by automating traditionally time-consuming features. While next-generation FPGAs deliver a greater level of functionality, design teams continue to be constrained by limited development times.
Using Altera’s design software, we are able to close timing quicker, meet our power budgets and fully maximize the performance benefits of our Altera device, all without increasing our FPGA development time.” Quartus II software provides us with the best environment to get our FPGA designs completed efficiently.
#ALTERA QUARTUS II V8.1 WINDOWS#
“While our FPGA-based systems demand higher performance and lower power, our market windows remain just as stringent. “Customers using our high-speed data acquisition boards rely on Acquisition Logic to quickly deliver solutions that process data in real time, which is why we leverage Altera’s FPGA technology,” said Michael Wyrick, vice president of engineering, Acquisition Logic. “The shrinking process geometries of FPGAs, combined with their increased functionality, necessitate the need for sophisticated tools that allow design teams to maximize their productivity and meet critical time-to-market goals.” “Managing design time and engineering resources is an increasing concern for companies using the latest deep-submicron FPGA technologies in their next-generation systems,” said Bryan Lewis, chief analyst with market research firm Gartner. The enhanced productivity features within Quartus II software enable design teams to close timing and power faster, lower R&D costs and shorten time to market. This latest release of Quartus II software continues the company’s history of delivering high-density FPGA compile times three times faster than other FPGA-vendor supplied development software, based on internal benchmarks. San Jose, Calif., November 3, 2008-Reaffirming its leadership position in performance and productivity for CPLD, FPGA, and HardCopy ® ASIC designs, Altera Corporation (NASDAQ: ALTR) today unveiled Quartus ® II software version 8.1. Altera Continues Its Productivity Leadership Position With Quartus II Software Version 8.1
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